T.T.N:Intel Stops Plans to Forgo 4GHz!

"In an unexpected move, Intel today announced that it will not move ahead with a 4GHz Pentium 4 after all. The chip, originally scheduled to appear by year end, is being cast aside in favor of larger-cache Pentium 4s at speeds of up to 3.8GHz. These P4s will have 2MB of L2 cache, similar to the Pentium 4 Extreme Edition targeted towards the deep-pocketed enthusiast crowd. P4s with the 2MB cache and clocked at 3.8GHz will begin shipping in early 2005; models with the larger cache running at lower clock speeds will follow.

The decision to drop plans for a 4GHz plans are a result of Intel's change in focus with regards to both processor strategy and marketing. Developments such as Intel's new processor labeling scheme along with the increased focus on dual cores demonstrate that Intel's clock speed fixation is at an end. In his article on the future of Prescott, Hannibal laid out Intel's CPU performance improvement strategy for its top-of-the-line desktop processor:

Intel's Pentium 4 architecture (a.k.a. Netburst) is predicated on the assumption that the former approach - shrink the core size and raise the clock speed - will translate into both better performance and better sales, because it's easier to sell MHz than it is to sell added functionality. The problem with this approach is twofold and can be summed up with two terms: transistor leakage and power density.

In Prescott's case, it looks like the answer is to try your best to adapt the old design to a new set of circumstances, rather than throwing it out the window. This means cranking way back on the clock speed increases, and taking advantage of Moore's Curves by adding functionality to the die instead.

The decision to increase the size of the L2 cache on the Pentium 4 along with the move towards a dual core design for Prescott demonstrate how Intel plans to continue performance enhancements on a CPU that's at the end of the line in terms of clock speed. Not that the Intel's situation is anything like Motorola's a couple of years ago, but the decision to increase the amount of cache across the board is reminiscent of the Motorola PPC 7450, which shipped with 256kb of L2 cache and 2MB of L3 cache in an attempt to wring extra performance out of the design.

Another factor in the decision to cancel the 4.0GHz part is likely a low expected return on investment. With dual core CPUs due in 2005, it's quite possible that a fully-qualified 4.0GHz part might not arrive on the scene until some time in 2005, maybe not until around the same time that the dual-core chips begin shipping. Such a delay is not out of the question, especially given that since the transition to 90nm, Intel has run into delays each time it has tried to step up the P4's clock speed. So for the foreseeable future, it looks like dual cores, increased cache, and 64-bit architecture will be the name of the game for Intel as it transitions to Merom, which is based on the older Pentium III architecture and due in 2007."